In recent years, a self-luminous type display device such as an electro luminescence (EL) display device and an FED (Field Emission Display) has been actively developed. A self-luminous display device is advantageous since it is highly visible, suitable for thin design as it does not require a backlight required in a liquid crystal display device (LCD) and the like, and its viewing angle is almost unlimited.
An EL element denotes an element having a light emitting layer in which a luminescence is obtained by applying electric field. The light emitting layer emits light when returning from a singlet excited state to a base state (fluorescence) and when returning from a triplet excited state to the base state (phosphorescence). The semiconductor device of the invention may employ either of the aforementioned light emitting systems.
The EL element typically has a laminated structure of a pair of electrodes (anode and cathode) and a light emitting layer sandwiched between them. One typical laminated structure is “anode/hole transporting layer/light emitting layer/electron transporting layer/cathode”. This structure is highly effective in emitting light, therefore, most EL elements which are presently under study employ this structure.
Other than the aforementioned structure, layers may be laminated between the anode and the cathode in the order of “hole injection layer/hole transporting layer/light emitting layer/electron transporting layer” or “hole injection layer/hole transporting layer/light emitting layer/electron transporting layer/electron injection layer”. Any of the aforementioned structures may be used in the EL element used in the semiconductor device of the invention. Further, a fluorescent pigment and the like may be doped to the light emitting layer.
In this specification, all kinds of layers provided between the anode and the cathode in the EL element are collectively referred to as an EL layer. Therefore, the aforementioned hole injection layer, hole transporting layer, light emitting layer, electron transporting layer, and electron injection layer are all included in the EL layer. A light emitting element formed of an anode, an EL layer, and a cathode is referred to as an EL element.
FIG. 5 shows a pixel structure of a typical semiconductor device. An EL display device is taken here as an example of a typical semiconductor device. A pixel shown in FIG. 5 comprises a source signal line 501, a gate signal line 502, a switching TFT 503, a driving TFT 504, a capacitor 505, an EL element 506, and power supplies 507 and 508.
Hereinafter described are connections between each component. A TFT includes three terminals: a gate, a source, and a drain, however, the source and drain cannot be distinguished because of the structure of TFT. Therefore, one of the source and drain is referred to as a first electrode and the other is referred to as a second electrode when describing the connections between the elements. Meanwhile, when describing the potential and the like of each terminal regarding ON and OFF of a TFT, description will be made as a source, a drain and the like.
A gate electrode of the switching TFT 503 is connected to the gate signal line 502, a first electrode thereof is connected to the source signal line 501, and a second electrode thereof is connected to a gate electrode of the driving TFT 504. A first electrode of the driving TFT 504 is connected to the power supply 507 and a second electrode thereof is connected to one electrode of the EL element 506. The other electrode of the EL element 506 is connected to the power supply 508. The capacitor 505 is connected between the gate electrode and the first electrode of the driving TFT 504 and holds a gate-source voltage of the driving TFT 504.
When a potential of the gate signal line 502 changes and the switching TFT 503 is turned ON, an image signal inputted to the source signal line 501 is inputted to the gate electrode of the driving TFT 504. A gate-source voltage of the driving TFT 504 is determined by a potential of the inputted image signal, and a current flowing between the source and drain of the driving TFT 504 (hereinafter referred to as a drain current) is determined accordingly. This current is supplied to the EL element 506 and it emits light.
A TFT formed of polycrystalline silicon (polysilicon, hereinafter referred to as P—Si) has high field effect mobility and can flow a large on-current, therefore, it is suited as a transistor used in a semiconductor device. On the other hand, its electric characteristics tend to vary easily due to a defect in the crystal grain boundary.
Provided that characteristics such as a threshold value of a TFT which forms a pixel or on-current vary in each pixel shown in FIG. 5, a drain current of the TFT varies accordingly even when the same image signal is inputted. Thus, a luminance of the EL element 506 varies.
In order to solve such a problem, it is preferable that a desired amount of current is supplied to the EL element regardless of the characteristics of the TFT. In view of this, various kinds of current write type pixels have been suggested which can control the amount of current flowing to the EL element regardless of the characteristics of the TFT.
In the current write type pixel, an image signal inputted from the source signal line to the pixel is inputted as current whereas it is typically inputted as analog or digital voltage data. Accordingly, a desired current value to be supplied to the EL element can be set as a signal current outside the pixel and an equivalent current is supplied to the pixel. Therefore, this method has an advantage that luminance is not affected by the variation of the characteristics of a TFT.
Several examples of typical current write type pixels are shown below and the structures, operations and characteristics thereof are described hereafter.
FIG. 6 shows a first configuration example (refer to Patent Document 1). The pixel shown in FIG. 6 comprises a source signal line 601, first to third gate signal lines 602 to 604, a current source line 605, TFTs 606 to 609, a capacitor 610, an EL element 611, and a signal current input current source 612.
[Patent Document 1]
Published Japanese Translation of PCT International Publication for Patent Applications No. 2002-517806
A gate electrode of the TFT 606 is connected to the first gate signal line 602, a first electrode thereof is connected to the source signal line 601, and a second electrode thereof is connected to a first electrode of the TFT 607, a first electrode of the TFIT 608, and a first electrode of the TFT 609. A gate electrode of the TFT 607 is connected to the second gate signal line 603 and a second electrode thereof is connected to a gate electrode of the TFT 608. A second electrode of the TFT 608 is connected to the current source line 605. A gate electrode of the TFT 609 is connected to the third gate signal line 604 and a second electrode thereof is connected to an anode of the EL element 611. The capacitor 610 is connected between the gate electrode and an input electrode of the TFT 608 and holds a gate-source voltage of the TFT 608. The current source line 605 and a cathode of the EL element 611 are inputted with predetermined potentials and have a potential difference to each other.
An operation from a write of a signal current to light emission is described with reference to FIG. 7. Reference numerals in FIG. 7 correspond to the ones in FIG. 6. FIGS. 7A to 7C each schematically shows a current flow. FIG. 7D shows a relation of current flowing each path when a signal current is written. FIG. 7E shows a voltage accumulated in the capacitor 610 when a signal current is written, that is a gate-source voltage of the TFT 608.
First, a pulse is inputted to the first gate signal line 602 and the second gate signal line 603 and the TFTs 606 and 607 are turned ON. At this time, a current flowing through the source signal line, that is a signal current is referred to as Idata.
As the current Idata flows through the source signal line, it is divided into I1 and I2 in the pixel as shown in FIG. 7A. This relation is shown in FIG. 7D. It is needless to say that Idata=I1+I2 is satisfied.
A charge is not yet held in the capacitor 610 right after the TFT 606 is turned ON, therefore, the TFT 608 is OFF. Therefore, I2=0 and Idata=I1 are satisfied. That is to say, current only flows into the capacitor 610 in the meantime.
After that, as the charge is gradually accumulated in the capacitor 610, a potential difference starts to generate between both electrodes (FIG. 7E). When the potential difference between the both electrodes reaches Vth (a point A in FIG. 7E), the TFT 608 is turned ON and I2 generates. As described above, as Idata=I1+I2 is satisfied, current still flows and a charge is accumulated in the capacitor while I1 decreases gradually.
The charge keeps being accumulated in the capacitor 610 until the potential difference between the both electrodes, that is a gate-source voltage of the TFT 608 reaches a desired voltage, that is a voltage (VGS) which can make the TFT 608 flow the current Idata. When the charge stops being accumulated (a point B in FIG. 7E), the current I2 stops flowing and the TFT 608 flows a current corresponding to VGS at that time and Idata=I2 is satisfied (FIG. 7B). Thus, a write operation of a signal is terminated. At last, selections of the first gate signal line 602 and the second gate signal line 603 are terminated to turn OFF the TFTs 606 and 607.
In this manner, an operation to make the TFT 608 flow the current Idata by accumulating a charge in the capacitor is hereinafter referred to as a set operation.
Subsequently, a light emitting operation starts. A pulse is inputted to the third gate signal line 604 to turn on the TFT 609. As the capacitor 610 holds VGS which is written before, the TFT 608 is ON and the current Idata flows from the current source line 605. Thus, the EL element 611 emits light. Provided that the TFT 608 is set to operate in a saturation region, Idata keeps flowing without changing even when a source-drain voltage of the TFT 608 changes.
In this manner, an operation to output a current set by the set operation is hereinafter referred to as an output operation.
FIG. 17 shows a second configuration example (refer to Patent Document 2). A pixel in FIG. 17 comprises a source signal line 1701, first to third gate signal lines 1702 to 1704, a current source line 1705, TFTs 1706 to 1709, a capacitor 1710, an EL element 1711, and a signal current input current source 1712.
[Patent Document 2]
Published Japanese Translation of PCT International Publication for Patent Applications No. 2002-514320
A gate electrode of the TFT 1706 is connected to the first gate signal line 1702, a first electrode thereof is connected to the source signal line 1701, and a second electrode thereof is connected to a first electrode of the TFT 1708 and a first electrode of the TFT 1709. A gate electrode of the TFT 1708 is connected to the second gate signal line 1703 and a second electrode thereof is connected to the current source line 1705. A gate electrode of the TFT 1707 is connected to the third gate signal line 1704, a first electrode thereof is connected to a gate electrode of the TFI 1709, and a second electrode thereof is connected to a second electrode of the TFT 1709 and one electrode of the EL element 1711. The capacitor 1710 is connected between the gate electrode and the first electrode of the TFIT 1709 and holds a gate-source voltage of the TFT 1709. The current source line 1705 and the other electrode of the EL element 1711 are inputted with predetermined potentials respectively and have a potential difference to each other.
An operation from a write of a signal current to light emission is described with reference to FIG. 18. Reference numerals in FIG. 18 correspond to the ones in FIG. 17. FIGS. 18A to 18C each schematically shows a current flow. FIG. 18D shows a relation of current flowing each path when a signal current is written. FIG. 18E shows a voltage accumulated in the capacitor 1710 when a signal current is written, that is a gate-source voltage of the TFIT 1709.
First, a pulse is inputted to the first gate signal line 1702 and the third gate signal line 1704 and the TFTs 1706 and 1707 are turned ON. At this time, a current flowing through the source signal line 1701, that is a signal current is referred to as Idata.
As for the current Idata flowing through the source signal line 1701, its current path is divided into I1 and I2 in the pixel as shown in FIG. 18A. This relation is shown in FIG. 18D. It is needless to say that Idata=I1+I2 is satisfied.
A charge is not yet held in the capacitor 1710 right after the TFT 1706 is turned ON, therefore, the TFT 1709 is OFF. Therefore, I2=0 and Idata=I1 are satisfied. That is to say, current only flows into the capacitor 1710 in the meantime.
After that, as the charge is gradually accumulated in the capacitor 1710, a potential difference starts to generate between both electrodes (FIG. 18E). When the potential difference between the both electrodes reaches Vth (a point A in FIG. 18E), the TFT 1709 is turned ON and I2 generates. As described above, as Idata=I1+I2 is satisfied, current still flows and a charge is accumulated in the capacitor while I1 decreases gradually.
The charge keeps being accumulated in the capacitor 1710 until the potential difference between the both electrodes, that is a gate-source voltage of the TFT 1709 reaches a desired voltage, that is a voltage (VGS) which can make the TFT 1709 flow the current Idata. When the charge stops being accumulated (a point B in FIG. 18E), the current I2 stops flowing and the TFT 1709 flows a current corresponding to VGS at that time and Idata=I2 is satisfied (FIG. 18B). Thus, a write operation of a signal is terminated. At last, selections of the first gate signal line 1702 and the third gate signal line 1704 are terminated to turn OFF the TFTs 1706 and 1707. In this manner, a set operation is terminated.
Subsequently, an output operation starts. As the capacitor 1710 holds VGS which is written before, the TFT 1709 is ON and the current Idata flows from the current source line 1705. Thus, the EL element 1711 emits light. Provided that the TFT 1709 is set to operate in a saturation region, Idata keeps flowing without changing even when a source-drain voltage of the TFT 1709 changes slightly.
FIG. 19 shows a third configuration example (refer to Patent Document 1). A pixel in FIG. 19 comprises a source signal line 1901, first and second gate signal lines 1902 and 1903, a current source line 1704, TFTs 1905 to 1908, a capacitor 1909, an EL element 1910, and a signal current input current source 1911.
[Patent Document 1]
International Publication WO01/06484
A gate electrode of the TFT 1905 is connected to the first gate signal line 1902, a first electrode thereof is connected to the source signal line 1901, and a second electrode thereof is connected to a first electrode of the TFT 1906 and a first electrode of the TFT 1907. A gate electrode of the TFT 1906 is connected to the second gate signal line 1903, a second electrode thereof is connected to a gate electrode of the TFT 1907 and a gate electrode of the TFT 1908. A second electrode of the TFT 1907 and a first electrode of 1908 are both connected to the current source line 1904 and a second electrode of the TFT 1908 is connected to an anode of the EL element 1910. The capacitor 1909 is connected between the gate electrodes of the TFTs 1907 and 1908 and the second electrode of the TFT 1907 and the first electrode of the TFT 1908 and holds a gate-source voltage of the TFTs 1907 and 1908. The current source line 1904 and a cathode of the EL element 1910 are inputted with predetermined potentials respectively and have a potential difference to each other.
An operation from a write of a signal current to light emission is described with reference to FIG. 20. Reference numerals in the drawings correspond to the ones in FIG. 20. FIGS. 20A to 20C each schematically shows a current flow. FIG. 20D shows a relation of current flowing each path when a signal current is written. FIG. 20E shows a voltage accumulated in the capacitor 1909 when a signal current is written, that is a gate-source voltage of the TFTs 1907 and 1908.
First, a pulse is inputted to the first gate signal line 1902 and the second gate signal line 1903 and the TFTs 1905 and 1906 are turned ON. At this time, a current flowing through the source signal line 1901, that is a signal current is referred to as Idata.
As for the current Idata flowing through the source signal line 1901, its current path is divided into I1 and I2 in the pixel as shown in FIG. 20A. This relation is shown in FIG. 20D. It is needless to say that Idata=I1+I2 is satisfied.
A charge is not yet held in the capacitor 1909 right after the TFT 1905 is turned ON, therefore, the TFTs 1707 and 1708 are OFF. Therefore, I2=0 and Idata=I1 are satisfied. That is to say, current only flows into the capacitor 1709 in the meantime.
After that, as the charge is gradually accumulated in the capacitor 1909, a potential difference starts to generate between both electrodes (FIG. 20E). When the potential difference between the both electrodes reaches Vth (a point A in FIG. 20E), the TFT 1907 is turned ON and I2 generates. As described above, as Idata=I1+I2 is satisfied, current still flows and a charge is accumulated in the capacitor while I1 decreases gradually.
Here, the TFT 1908 is turned ON while the TFT 1907 is turned ON, and a current starts flowing. However, this current flows through an independent path as shown in FIG. 20A, therefore, a value of Idata does not change and does not influence either I1 or I2.
The charge keeps being accumulated in the capacitor 1909 until the potential difference between the both electrodes, that is a gate-source voltage of the TFTs 1907 and 1908 reaches a desired voltage, that is a voltage (VGS) which can make the TFT 1907 flow the current Idata. When the charge stops being accumulated (a point B in FIG. 18E), the current I2 stops flowing and the TFT 1907 flows a current corresponding to VGS at that time and Idata=I2 is satisfied (FIG. 18B). Thus, a write operation of a signal is terminated. At last, selections of the first gate signal line 1902 and the second gate signal line 1903 are terminated to turn OFF the TFTs 1905 and 1906.
At this moment, the capacitor 1909 holds enough charge to apply a gate-source voltage which can flow the current Idata through the TFT 1907. As the TFTs 1907 and 1908 form a current mirror, the voltage is applied to the TFT 1908 as well and a current flows through the TFT 1908. FIG. 20 shows this current by IEL.
Provided that the TFT 1907 and the TFT 1908 have the same gate length and channel width, IEL=Idata is satisfied. That is, a relation between the signal current Idata and the current IEL supplied to the EL element can be determined by adjusting the size of the TFTs 1907 and 1908 which form a current mirror.
In this manner, the output operation can be performed while the set operation is performed in the case of the third configuration example.
It is an advantage of the current write type of which example is described above that a gate-source voltage required to flow the current Idata is held in the capacitor 610 even when the TFT 608 has variations in characteristics and the like. Therefore, a desired current can be supplied to the EL element accurately and luminance variations due to the variations in characteristics of the TFTs can be suppressed.